Call for Papers

 Please click here to download the pdf version.

Topics of Interest

The areas of interest include (but are not limited to):

  • Tools and Design techniques for field-programmable technology: placement, routing, synthesis, verification, debugging, run-time support, technology mapping, partitioning, parallelization, timing optimization, design and run-time environments, languages and modeling techniques, provably-correct development, intellectual property core-based design, domain-specific development, hardware/software co-design.
  • Architectures for field-programmable technology: field-programmable gate arrays, complex programmable logic devices, coarse-grained reconfigurable arrays, field-programmable interconnect, field-programmable analogue arrays, field-programmable arithmetic arrays, memory architectures, interface technologies, low-power techniques, adaptive devices, reconfigurable computing systems, high-performance reconfigurable systems, evolvable hardware and adaptive computing, fault tolerance and avoidance.
  • Device technology for field-programmable technology: programmable memories such as non-volatile, dynamic and static memory cells and arrays, interconnect devices, circuits and switches, and emerging VLSI device technologies.
  • Applications of field-programmable technology: biomedical and scientific computation accelerators, network processors, real-time systems, rapid prototyping, hardware emulation, digital signal processing, interactive multimedia, machine vision, computer graphics, cryptography, robotics, manufacturing systems, embedded applications, evolvable and biologically-inspired hardware, financial application, big data management, aerospace and extreme environment applications.
  • Education for field-programmable technology: courses, teaching and training experience, experiment equipment, design and applications.
Special Session 1: Hardware Security on FPGA

The special session on Hardware Security in FPT 2014 aims to bring together the academic scientists, researchers and scholars to exchange and share their experiences and research results in the leading technologies and applications related to the hardware security on FPGAs. The topics include (but are not limited to):

  • The security-attacking techniques, including the Trojan design, side channel techniques, reverse engineering and hacking techniques (e.g. to encryption, license, etc.).
  • The security-defending techniques, including the Trojan defense (detection and Trojan-preventing design), intellectual property protection (prevention from the overbuilding, counterfeit, replay, license-cracking, piracy, reverse engineering, side channel, etc.), reliability enhancement against the external attacks (e.g. the fault attacks) and secure hardware authentication (e.g. IC identification, tracing and Trojan detection).
  • The security-related applications on FPGAs, including the security-centric applications on FPGAs and the security attacking/defending implementations on FPGAs.
Special Session 2: Prognostic and Health Management (PHM) with FPGA
The special session on PHM with FPGA in FPT 2014 aims to bring together the academic scientists, researchers and scholars to exchange and share their experiences and research results in the leading technologies and applications related to the PHM with FPGA. The data-driven methodologies gradually become the hot issues in Prognostics of complex systems, in which condition monitoring, anomaly detection, diagnostics, remaining useful life estimation based on popular machine learning algorithms are involving. The topics include (but are not limited to):
  • System monitoring with FPGA, including sensing technologies, instruments design, preprocessing, anomaly detection, and trends analysis.
  • Prognostics with FPGA, including machine learning, model-based methods, hybrid approaches and other related methods.
  • Reliable computing with FPGA technology, including SEU simulation, anti SEU tech, and spatial application of FPGA.
  • PHM Applications with FPGA and other embedded platform.
Submission Guidelines

The program committee solicits papers describing original research or high quality tutorial expositions in field programmable technology, including, but not limited to, the areas of interest indicated above. High quality posters are also solicited. Current postgraduate research students are invited to submit a short paper detailing their proposed research to be presented in a poster based Ph.D. forum. Papers should be submitted electronically via the conference website in PDF format, following the IEEE style. Full papers should not exceed 8 pages in length, while posters should not exceed 4 pages in length. Ph.D. forum papers are limited to 2 pages. Manuscripts must not identify authors or their affiliations. Self-references can either (1) be shown as "Removed for blind review" or (2) be referenced in the 3rd person, in the same way you would reference work by another group.


In order to avoid TPC members providing reviews for papers submitted by close colleages (e.g., those from the same institution), authors should identify TPC members who would have a conflict of interest from the checkbox list on the submission page.


Important Dates

Technical Program

     ▪Submission Due Date: June 16, 2014

     ▪Abstract Submission Due Date: June 30, 2014

     ▪Full Paper Submission Due Date: July 7, 2014

     ▪Notification of Acceptance: Sep. 18, 2014

     ▪Final Version Submission: Oct. 31, 2014

Demo Session

     ▪Submission Due Date: Sep. 19, 2014

     ▪Notification: Oct. 5, 2014

     ▪Final Version Submission: Oct. 31, 2014

Ph.D. Forum Paper

     ▪Submission Due Date: Sep. 19, 2014

     ▪Notification: Oct. 1, 2014

     ▪Final Version Submission: Oct. 31, 2014

Design Competition Registration and Paper Submission

     ▪Entry of design competition: Sep. 9, 2014

     ▪Submission of design competition papers:  Oct. 1, 2014

     ▪Notification: Oct. 10, 2014

     ▪Final Version Submission: Oct. 31, 2014

Submission Link

    Paper submission: